36702
iSPAN 36702 4G Wireless Base Station AdvancedMC™
The iSPAN 36702 supports the complete functions of a 4G Wireless Base Station (with the exception of the radio) in a very small footprint. It is designed for use in 4G Networks including the LTE eNodeB as well as next generation WiMAX Base stations. It features three Optical Interfaces on the front panel for CSPRI/OBSAI Baseband interfaces or Gigabit Ethernet interfaces and AMC connector support for a combination of Gigabit Ethernet, Serial RapidIO™ and PCI-Express™ links.
Features:
- Wintegra WinPath3 Network Processor - scalable RLC/MAC software is fully programmable in subset of C and uses multi-cores, including dual MIPS cores
- Xilinx Virtex-6 FPGA - Downlink and Uplink LTE PHY processing: LTE Turbo Encoder / Decoder, Rate Matching, FFT/iFFT with Cyclic Prefix Insertion, QAM mapper / demapper
- Deterministic processing provides low latency processing of intensive operations like the 1ms TTI processing for the LTE scheduler
- Rich Ecosystem of software tools and applications available through Interphase Partners - S1/X2 network interface support including IPSEC and GTP tunneling - eNodeB / WiMAX Application Software
- Scalable solutions by integrating multiple 36702’s and adding external processing capacity such as the Interphase 36CA / 36MC2
High Performance Platform - Multicore Processor and FPGA
The 36702 utilizes Wintegra’s WinPath3 Network Processor with multiple Protocol Processing engines and MIPS processor cores for base station control. The WinPath3 supports L2 / L3 wireless protocols aligned with the latest 3GPP requirements and provides traffic policing and shaping, protocol conversion, and switching capability at 1/3 the power of general purpose multi-core solutions. The 36702 also utilizes the Virtex-6 FPGA Scalable programmable PHY hardware from Xilinx with footprint compatibility across device family.
This combination of the WinPath 3 and the Virtex-6 offers
- Scalable RLC/MAC software from Wintegra:
- From 1.25 -> 20MHz per sector
- From 1 -> 3 sectors per device
- Layer 2 PDCP/RoHC implementation
- Backhaul and air interface security: support for AES, 3DES, HMAC-SHA1, HMAC-MD3, SNOW-3G
- Flexible, ‘software-defined’ PHY silicon from Xilinx with LTE Downlink and Uplink
- low latency, lower power & high compute bandwidth processing
- MAC/PHY API interface for tightly coupled L1/L2 solution
Accelerated Development / Lower cost of ownership
- PHY, L1/L2 Software and Hardware Reference Designs => “fast-start” development
- Common Platform for complete portfolio => develop Pico to Multi sector Micro cell solutions which can be reutilized in Macro cells as well.
Road to 4G The 36702 is designed as an entry point for the development of next generation wireless micro, pico, and enterprise femto cell base stations. Interphase can adapt extend this solution to meet your needs in AMC or in any other form factor required.
Applications
- 4G LTE eNodeB
- WiMAX Base Station
- Picocell
- Microcell
- Enterprise Femtocell
Product Documents
Specifications
- Processor: Wintegra WinPath3 Network Processor
- 9 Protocol Processing Engines (expandable to 12)
- 2 34K MIPS 32-bit RISC cores running at 622/700 MHz
- Traffic manager (3 level shaping, Policer accelerator, Queue managers, Parser and Classifier
- Control Stacks available from Third parties integrated with WDDI
- Two embedded MIPS processors which can support the Wireless Application – LTE or WiMAX
- Baseband: Xilinx Virtex-6 FPGA
- Front Panel:
- 3 SFP receptacles on the front panel configurable as CPRI / OBSAI Remote Radio Head interfaces or GE
- Synchronous Ethernet Support
- SMB micro coaxial for GPS 1pps signal input/output
- Micro-B USB receptacle for UART interface
- Gigabit Ethernet :
- AMC.2 Type E2, ports 0,1 GE
- AMC.2 Type 4 GE or AMC.2 Type 5 XAUI10 GE ports 8-11
- Two additional GE interfaces on port 19, 20
- PCI-Express:
- AMC.1 Type 1 PCI-e on port 4
- PCI Express 100 MHz clock on AdvancedMC FCLKA
- Serial Rapid IO:
- AMC.4 Type 10 sRIO on ports 8-11
- Choice of GE or sRIO on these ports
- Memory:
- 256MB 32-bit DDR3 SDRAM on Application bus,
- 256MB 32-bit DDR3 SDRAM on Packet bus.
- 256MB 32-bit DDR3 SDRAM on Parameter bus.
- 128MB 16-bit + 256MB 32-bit DDR3 SDRAM on FPGA
- 64MB downloadable 16-bit Boot Flash EPROM
- 256MB downloadable 8-bit Storage Flash EPROM 512Kbit
- I²C Serial EEPROM
- Form Factor: AMC.0 R2.0 AdvancedMC Mid-size or Full Size
- Power Consumption: ~30W typical depending on WinPath 3 and Virtex-6 equipped